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IND/INDR/INI/INIR/OUTD/OTDR/OUTI/OTIR

chevchev
edited May 2012 in Emulators
I'm looking for confirmation that the official Z80 User Guide from Zilog is wrong and that these composite instructions actually change the value of B first. You'd only notice this when reading or writing from a 16-bit I/O address using one of these instructions. Also is there a test suite to see if these instructions are emulated correctly?
Post edited by chev on
zx.itch.io

Comments

  • oboobo
    edited May 2012
    B is certainly decremented before first use in OTDR, as the common way to set the SAM palette (16 entries on ports 00F8 to 0FF8 ) is: 
    ld  hl,palette+15
ld  bc,&10f8
otdr
    Looking at the Z80 core I'm using (originally from xz80), the OUT instructions decrement B before use, the IN instructions decrement after use. What do the docs you're using say?
  • chevchev
    edited May 2012
    obo wrote: »
    B is certainly decremented before first use in OTDR, as the common way to set the SAM palette (16 entries on ports 00F8 to 0FF8 ) is: 
    ld  hl,palette+15
ld  bc,&10f8
otdr
    Looking at the Z80 core I'm using (originally from xz80), the OUT instructions decrement B before use, the IN instructions decrement after use. What do the docs you're using say?

    The official Z80 User Guide from Zilog says the BC <- (HL), DEC B, ... and I can't find an unofficial doc that categorically states something different. I expect there are quite a few emulators out there with broken Z80 cores as a result of this.
    zx.itch.io
  • Alcoholics AnonymousAlcoholics Anonymous
    edited May 2012
    ..but read the text description in Zilog's manual :)

    Here it is for OTIR:

    The contents of the HL register pair are placed on the address bus to select
    a location in memory. The byte contained in this memory location is temporarily stored in the CPU. Then, after the byte counter (B) is decremented, the contents of register C are placed on the bottom half (A0 through A7) of the address bus to select the I/O device at one of 256 possible ports. Register B may be used as a byte counter, and its decremented value is placed on the top half (A8 through A15) of the address bus at this time

    Unnecessarily wordy; my other z80 book does it more economically.
    Z88DK - A Complete Z80 Development Toolkit
    Write games in C using Z88DK and SP1
  • ccowleyccowley
    edited May 2012
    vbSpec and vb81 have been decrementing B first (for OUTs) since v1.0 in early 2000.

    God, I'm good. :)
  • chevchev
    edited May 2012
    Alcoholics Anonymous wrote: »
    ..but read the text description in Zilog's manual :)

    Here it is for OTIR:

    The contents of the HL register pair are placed on the address bus to select
    a location in memory. The byte contained in this memory location is temporarily stored in the CPU. Then, after the byte counter (B) is decremented, the contents of register C are placed on the bottom half (A0 through A7) of the address bus to select the I/O device at one of 256 possible ports. Register B may be used as a byte counter, and its decremented value is placed on the top half (A8 through A15) of the address bus at this time

    Unnecessarily wordy; my other z80 book does it more economically.

    Ok, so the book isn't completely wrong, but the summary has resulted in at least two broken Z80 cores.
    zx.itch.io
  • Battle BunnyBattle Bunny
    edited May 2012
    The document The Undocumented Z80 Documented (PDF, 2005) refers to this on page 17, but just concurs with what has been said in other replies.

    I'd agree that the example for OTDR of:
    BC <- (HL), DEC B, ...
    could lead one to believe it worked in the way suggested, but the Z80 Family CPU User Manual UM008005-0205 (PDF, revision 5, 2005) from zilog.com gives the operation of OTDR as:
    (C) <- (HL), B <- B - 1, HL <- HL - 1
    There would appear to be several different versions of the Z80 user manual, with different ways of describing the same thing, some clearer than others.

    Although UM008005-0205 isn't absolutely reliable either; eg. INDR operation is given as:
    (HL)<- (C), B <- 131, HL <- HL1
    ...
  • Patrik RakPatrik Rak
    edited May 2012
    aowen wrote: »
    You'd only notice this when reading or writing from a 16-bit I/O address using one of these instructions.

    Not only that - it also affects how/when/if the contention is applied.

    Patrik
  • OibafOibaf
    edited May 2012
    I wrote to Jan, the author of "The Undocumented Z80 Documented" and he replied that he does not remember why he wrote that "The INI/INIR/IND/INDR instructions use BC after decrementing B, and the OUTI/OTIR/OUTD/OTDR
    instructions before."

    Anyhow, this is the opposite of what the UM008005-0205 manual says.

    My old Z80 manual by Rodnay Zaks (programming the z80) states that in OTIR DEC B is executed after (I understand this is wrong).
  • WoodyWoody
    edited May 2012
    +3DOS couldn't read a disk sector with a pre-decremented B register in INI.
    +3DOS couldn't write a disk sector without a pre-decremented B register in OUTI.
  • chevchev
    edited May 2012
    Woody wrote: »
    +3DOS couldn't read a disk sector with a pre-decremented B register in INI.
    +3DOS couldn't write a disk sector without a pre-decremented B register in OUTI.

    Thanks. I presume that +3 emulators that have broken Z80 cores get away with it because they don't emulate the OS at a low level?
    zx.itch.io
  • OibafOibaf
    edited May 2012
    FBZX, which has a broken z80 core for OUTIs, does not have a +3 disk drive emulation.
  • chevchev
    edited May 2012
    Oibaf wrote: »
    FBZX, which has a broken z80 core for OUTIs, does not have a +3 disk drive emulation.

    There are other emulators that don't get that instruction right. It's really very unclear from the manual.
    zx.itch.io
  • mcleod_ideafixmcleod_ideafix
    edited May 2012
    Oibaf wrote: »
    My old Z80 manual by Rodnay Zaks (programming the z80) states that in OTIR DEC B is executed after (I understand this is wrong).

    My copy of Rodnay Zaks (third edition) says for OTIR: "C supplies bits A0 to A7 of the address bus. B supplies (after decrementation) bits A8 to A15)" (pag. 364)
  • Alcoholics AnonymousAlcoholics Anonymous
    edited May 2012
    If there are problems with some z80 cores it's surely because the developers didn't RTFM. This info is not new nor hidden :P
    Z88DK - A Complete Z80 Development Toolkit
    Write games in C using Z88DK and SP1
  • AY ChipAY Chip
    edited May 2012
    Alcoholics Anonymous wrote: »
    If there are problems with some z80 cores it's surely because the developers didn't RTFM. This info is not new nor hidden :P

    I am one of said developers, and Spiffy was one of the z80 cores to which Andrew was referring.

    I can categorically state that I did RTFM, in fact not just the manual but also The Undocumented Z80 Documented. This is an easy thing to get wrong and someone who maintains some kind of technical document probably ought to do something about it. Or something.
  • chevchev
    edited May 2012
    Alcoholics Anonymous wrote: »
    If there are problems with some z80 cores it's surely because the developers didn't RTFM. This info is not new nor hidden :P

    Sure, if you read the manual in full. But if you just read the summary in another document you could be forgiven for getting it wrong.
    zx.itch.io
  • ccowleyccowley
    edited May 2012
    aowen wrote: »
    Sure, if you read the manual in full. But if you just read the summary in another document you could be forgiven for getting it wrong.
    I figure that if a know-nothing nerk like me can get it right then it shouldn't be that difficult for anyone else... writing an z80 core is all about attention to detail, surely.
  • rich_chandlerrich_chandler
    edited May 2012
    ccowley wrote: »
    I figure that if a know-nothing nerk like me can get it right then it shouldn't be that difficult for anyone else... writing an z80 core is all about attention to detail, surely.
    And I'm at least two levels down from you and I got it right as well...
    I wanna tell you a story 'bout a woman I know...
  • KorinelKorinel
    edited May 2012
    So would it be correct to say:
    • Correct "B usage" documentation - Zilogs "Z80 Family CPU User Manual" UM008005-0205
    • Correct "B usage" documentation - Programming the Z80 3rd Edition by Rodnay Zaks
    • Incorrect "B usage" documentation - The Undocumented Z80 Documented, Sean Young Version 0.91, 18th September, 2005

    And in summary:
    IND,INDR,INI,INIR - All modify B after/post use
    OTDR,OTIR,OUTD,OUTI - All modify B before/pre use
  • chevchev
    edited May 2012
    Korinel wrote: »
    So would it be correct to say:
    • Correct "B usage" documentation - Zilogs "Z80 Family CPU User Manual" UM008005-0205
    • Correct "B usage" documentation - Programming the Z80 3rd Edition by Rodnay Zaks
    • Incorrect "B usage" documentation - The Undocumented Z80 Documented, Sean Young Version 0.91, 18th September, 2005

    And in summary:
    IND,INDR,INI,INIR - All modify B after/post use
    OTDR,OTIR,OUTD,OUTI - All modify B before/pre use

    Clearly Sean Young should have stuck to acting.
    zx.itch.io
  • OibafOibaf
    edited May 2012
    Jan, the current mantainer of "The Undocumented Z80 Documented", wrote me that he made some tests and verfied on real z80 hardware that the original documentation is correct and in "The Undocumented Z80 Documented" the OTIR/INIR behaviour is reversed.

    He will update the document and publish it soon.
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