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pc keyboard for speccy

rustyredlinerustyredline
edited April 2012 in Hardware
is it possible to use a ps/2 keyboard for a speccy. I have a +2A, spectrum+ and toastrack, which all have broken keys. So an external keyboard would be very useful. I know they used to be advertised in crash and other speccy mags. But I have spae ps/2 keyboards that i could use but i imagie the mappings would be wrong and it would be impossible for someone like me :-(
Post edited by rustyredline on

Comments

  • BiNMaNBiNMaN
    edited April 2012
    here's some for sale on sellmyretro.com

    or

    on Ben's site

    although I'm not sure if it's compatable with a +2a see Ben's thread
  • rustyredlinerustyredline
    edited April 2012
    excellent product, just a bit pricey for me as it does not support the +2A:-(. Thanks for your reply.
  • mcleod_ideafixmcleod_ideafix
    edited April 2012
    The +2A is not supported as a external interface, but if you rewire it to connect directly to X and Y connectors in your +2A, it should work.

    To do that:
    - Remove bus connector and pass-thru connector to leave the actual interface board alone so that you can put it inside your computer.
    - Wire power, GND, control and address lines from the computer to appropiate places in the interface. You will need to wire address pins A8 to A15, and A0. Control signals to wire are IORQ and RD.
    - Route D0-D4 data lines from the interface right to pins 1-5 of Y keyboard connector. The X keyboard connector is not used here.
  • bversteebverstee
    edited April 2012
    mcleod_ideafix wrote: »
    The +2A is not supported as a external interface, but if you rewire it to connect directly to X and Y connectors in your +2A, it should work.

    To do that:
    - Remove bus connector and pass-thru connector to leave the actual interface board alone so that you can put it inside your computer.
    - Wire power, GND, control and address lines from the computer to appropiate places in the interface. You will need to wire address pins A8 to A15, and A0. Control signals to wire are IORQ and RD.
    - Route D0-D4 data lines from the interface right to pins 1-5 of Y keyboard connector. The X keyboard connector is not used here.

    I did it this way: http://www.worldofspectrum.org/forums/showthread.php?t=38493

    As I say there, it should also be possible to use a GAL to modify the matrix array (+2A's ULA) logic so it's not selected when a keyboard scan is activated.
    That should be more easy than the 'resistor fix'.
  • mcleod_ideafixmcleod_ideafix
    edited April 2012
    bverstee wrote: »
    it should also be possible to use a GAL to modify the matrix array (+2A's ULA) logic so it's not selected when a keyboard scan is activated.
    That should be more easy than the 'resistor fix'.

    But the EAR port is also read at the same time. If you disable the ULA when a read is made to port FEh, you will have to implement bit 6 in the GAL too, or you will end up with a deaf ULA :D
  • bversteebverstee
    edited April 2012
    mcleod_ideafix wrote: »
    But the EAR port is also read at the same time. If you disable the ULA when a read is made to port FEh, you will have to implement bit 6 in the GAL too, or you will end up with a deaf ULA :D

    Good one, didn't think of that before.
    Still a GAL is the easiest solution I think.
  • mcleod_ideafixmcleod_ideafix
    edited April 2012
    bverstee wrote: »
    Good one, didn't think of that before.
    Still a GAL is the easiest solution I think.

    Indeed! I "repaired" (say, bypassed) a partially damaged ULA that way: display and RAM management were ok, but keyboard, ear, mic and speaker were not (still, the border did work). I programmed a GAL to take over keyboard, ear and speaker, lifted the ULA pins that control the keyboard (the damaged suffered by this ULA caused all keyboard inputs to go low), and put the GAL so it can read keyboard columns, plus EAR, and form a 8-bit value to output to the CPU (the CPU data bus side, not the ULA data bus side).

    YouTube video:
    http://www.youtube.com/watch?v=VDnqi15vf7E

    GAL equations (CUPL format) 
    PartNo   00 ;
Date     28/11/2010 ;
Revision 01 ;
Designer Miguel Angel Rodriguez Jodar ;
Company  ATC ;
Assembly None ;
Location Sevilla, Spain ;
Device   g16v8 ;

/* *************** INPUT PINS *********************/
PIN  1   = WR                         ; /* WR signal from Z80 */ 
PIN  2   = IORQGE                     ; /* IORQ + A0 */ 
PIN  3   = RD                         ; /* RD signal from Z80 */ 
PIN  4   = EAR                        ; /* EAR input signal, TTL level */ 
PIN  5   = KB0                        ; /*                                 */ 
PIN  6   = KB1                        ; /*                                 */ 
PIN  7   = KB2                        ; /*   KB0 to KB4, keyboard columns  */ 
PIN  8   = KB3                        ; /*                                 */ 
PIN  9   = KB4                        ; /*                                 */ 
/* *************** OUTPUT PINS *********************/
PIN 13    = SPK                       ; /* Speaker output (D4 from port $FE) */ 
PIN 14    = D6                        ; /*                                 */ 
PIN 15    = D0                        ; /*                                 */ 
PIN 16    = D1                        ; /*   Lines from Z80 data bus       */ 
PIN 17    = D2                        ; /*                                 */ 
PIN 18    = D3                        ; /*                                 */ 
PIN 19    = D4                        ; /*                                 */ 

/* enable signal for driving a read operation from port $FE */
ENABLE=!(IORQGE # RD);

/* 5 bit tristate buffer to supply keyboard data and EAR state */
D0=KB0;
D1='b'0;
D2='b'0;
D3='b'0;
D4='b'0;
D6=EAR;
D0.OE=ENABLE;
D1.OE=ENABLE & !KB1;
D2.OE=ENABLE & !KB2;
D3.OE=ENABLE & !KB3;
D4.OE=ENABLE & !KB4;
D6.OE=ENABLE;

/* 1 bit latch triggered by a WR low to high edge, enabling D4 to enter the latch only
when port $FE is being written */
SPK.D = (SPK & IORQGE) # (D4 & !IORQGE);
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