Mastering flags

edited September 2016 in Development
I'm little lost when different flags are set/reset after logic operations, and what conditions must be met.

For example,
	ld      a, MODE
	xor     (hl)
	jp      p, xxx

in what situation parity is set? From code around the quoted piece I found, that bit 7 is in play.

Is "Z80 CPU User’s Manual" must read source, or can somebody point me to better resource to get familiar?
Maybe some table with essentials and comments, like
J1hWRZw.png
Post edited by Bedazzle on
Heavy on the disasm

Comments

  • The parity flag is set when the result has an even number of bits set.
    It's always nice to have a mnemonics table at hand for this kind of stuff. For example, http://www.z80.info/z80flag.htm deals specifically with flags.
  • edited September 2016
    P/M is the sign flag, not parity. It is checking whether the result of the operation was positive (P, bit 7 = 0) or negative (M, bit 7 = 1)

    'P/V' is this:
    (PE: P/V=1, PO: P/V=0)
    1. In INC r/DEC r, ADD/SUB set to PE if the result crosses the value of #80 (like the carry flag in ADD/SUB when the result crosses 0), otherwise set to PO.
    2. 'Long' rotations and logic operations set it to PE if the result has even number of set bits (2, 4...), otherwise PO.
    3. In block operations (LDI, CPI etc), PO is set when BC reaches 0, otherwise PE.
    4. LD A,I / LD A,R: PE is set if interrupts are enabled, PO if disabled.
    Post edited by Hikaru on
  • Damn, well spotted Hikaru ;)

    Indeed, the "P/M" condition operates on the S flag, not the P/V flag.
  • Hikaru wrote: »
    2. 'Long' rotations and logic operations set it to PE if the result has even number of set bits (2, 4...), otherwise PO.

    You mean
         ld a, %00001111
         sla
         jp p, xxx
    

    and
         ld a, %00000111
         sla
         jp p, xxx
    

    will produce different result? And what is "long rotations"?
    Heavy on the disasm
  • I suspect these will probably give the same result. Something along the lines of 'insufficient arguments for SLA' :)

    Now pay attention:

    JP M/JP P: sign flag
    JP PE/JP PO: parity flag

    So if you have for instance used SLA A: JP PE (or JP PO) then the answer is yes.

    Long rotations is what I call the 2-byte rotate/shift instructions that take 8 and more T states. Basically everything that isn't RLA/RRA/RLCA/RRCA (notice that these also have 'long' 2-byte equivalents, typically written as RL A/ RR A/etc).
    Thanked by 1Bedazzle
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